An Ultra-Low-Power Integrate-and-Fire ADC for Compact Current Measurement

1. Why Is Precision Current Measurement Crucial in Modern Systems?

Precision current measurement is a key requirement across consumer electronics, industrial systems, automotive applications, and medical devices, where ASICs are increasingly used to deliver highly integrated, application-specific solutions.

In consumer electronics, accurate current sensing is essential for optimizing battery life and ensuring safe operation in smartphones, wearables, and laptops. Power management ASICs rely on precise current data to regulate charging cycles, detect abnormal conditions, and extend overall device longevity.

In industrial and automotive applications, the requirements are even more stringent. Systems such as motor drives, robotics, and electric vehicles depend on high-accuracy measurement for control algorithms, energy efficiency, and fault detection. In these environments, ASICs must handle wide dynamic ranges and harsh operating conditions, making robust current sensing critical for maintaining performance and meeting safety standards.

The medical domain imposes some of the most demanding constraints. Devices such as patient monitoring systems, infusion pumps, and implantable electronics require extremely reliable current sensing to ensure correct operation and patient safety. In low-power biomedical implants, accurate current monitoring enables precise control of stimulation signals and prolongs battery life, which is crucial for minimizing surgical interventions. In diagnostic equipment, small current variations can carry meaningful physiological information, making precision a key factor in achieving reliable measurements.

Across all these markets, the importance of precision current measurement directly impacts efficiency, safety, and functionality. Whether it is by extending battery life in consumer devices, ensuring safe operation in industrial systems, or safeguarding human health in medical applications, accurate current sensing within ASICs is a cornerstone of modern electronic design.

2. How Can Integrate-and-Fire ADCs Digitize Current Efficiently?

An important architecture for achieving high-precision current measurement in ASICs is the integrate-and-fire ADC, a current-to-frequency conversion technique particularly well suited for low-level signal sensing and wide-dynamic-range applications.

2.1. How Does an Integrate-and-Fire ADC Work?

Figure 1 - Integrate-and-Fire basic architecture.

An integrate-and-fire ADC operates by integrating an input current onto a capacitor over time. As charge accumulates, the voltage across the capacitor increases until it reaches a predefined threshold. At this point, a comparator triggers a “fire” event, resetting the integrator and generating a digital pulse.

The frequency or count of these pulses over a given time interval is directly proportional to the current input. This approach effectively converts current into a frequency-domain or pulse-domain signal, which can then be processed digitally. The simplest form of processing is a digital counter, which effectively acts as a first-order averaging filter.

This architecture is particularly well-suited for low-current sensing applications. In consumer electronics, integrate-and-fire ADCs enable ultra-low-power battery monitoring by accurately measuring small currents without power-hungry analog circuits.

In addition, its intrinsic simplicity allows implementations using a minimal footprint and reduced overall system cost. This fact enables efficient scalability, making it particularly well-suited for high-density integration scenarios such as spectroscopy. At the same time, its compact form factor and efficiency make it an ideal choice for space-constrained applications, including implantable devices. 

2.2. How Can We Improve Linearity in IAF ADCs?

Figure 2 - Soft-reset modification.

In an ideal IAF ADC, the input current is integrated on a capacitor until a fixed threshold is reached, at which point the system “fires” and resets. The output pulse frequency is expected to be linearly proportional to the input current. However, in practical implementations, several non-idealities degrade this linear relationship.

One major source of error is the reset operation. In a conventional hard-reset scheme (depicted in Fig. 1), the integrator capacitor is rapidly discharged to a fixed baseline. This sudden transition introduces errors due to charge injection, incomplete discharge, and timing uncertainty. As a result, the effective integration interval is distorted, leading to nonlinearity, especially at higher input currents where reset events occur more frequently.

Another contributor to nonlinearity is comparator delay. Since the “fire” decision is not instantaneous, excess charge continues to accumulate during the delay, causing systematic overestimation of the input current. This effect becomes input-dependent, further degrading linearity. Additionally, finite gain and offset in the analog front-end, as well as capacitor mismatches, can introduce curvature in the I-to-Frequency transfer characteristic.

To address these issues, soft-reset techniques have been developed, such as the one depicted in Fig. 2. Instead of abruptly discharging the capacitor, the soft-reset gradually removes a deterministic amount of charge, using an auxiliary capacitor. This approach minimizes disturbances to the integrator node, ensuring more consistent and predictable reset behavior. As a result, it improves the linearity of the transfer function.

2.3. How Can Sub-Converters Boost Resolution?

Figure 3 – Sub-converter implementation 

While integrate-and-fire (IAF) ADCs offer an efficient way to measure current, their resolution is fundamentally limited by the quantization of pulse counts over a finite observation window. While it is possible to increase this window and average over a longer time (effectively trading speed for resolution), there might be applications requiring higher precision, such as medical instrumentation or high-accuracy power monitoring, therefore this coarse quantization can become a bottleneck.

To overcome this limitation, a sub-converter can be introduced to capture the residual information that remains at the end of the coarse conversion. As shown in Fig. 3, the basic architecture is not able to measure fractional events. However, this information still exists as a residual voltage in the capacitor or in the timing measurement. In this example the information is recovered via a time measurement by combining a TDC into the IAF circuit.

By leveraging a TDC as a sub-converter, IAF-based ADCs can bridge the gap between simplicity and high resolution, making them a compelling solution for next-generation ASIC designs that require both efficiency and precision.

2.4. How Can We Mitigate Low-Frequency Noise?

Figure 4 - Low-frequency noise cancellation improvement.

IAF ADCs face particular challenges in very low-frequency current measurement, where slowly varying signals produce a variation on the frequency of events. This scenario is common in applications such as long-term battery monitoring in consumer devices, standby current analysis in industrial systems, and especially in medical applications like biosignal acquisition (e.g., electrochemical sensing or slow neural activity). In these cases, the average input current may be extremely small, leading to long integration times between firing events and making the system more susceptible to noise and drift.

At extremely low frequencies, noise sources such as flicker noise (1/f noise), leakage currents, and offset variations in the integrator and comparator begin to dominate. Since the IAF architecture relies on accurately accumulating charge over time, any low-frequency noise or drift directly corrupts the measurement, introducing significant errors. Additionally, long observation windows increase vulnerability to environmental disturbances and circuit non-idealities, which can mask the already weak input signal.

To enable the use of IAF ADCs in this regime, noise cancellation schemes are often employed. These techniques aim to suppress low-frequency noise and offset errors without compromising the fundamental advantages of architecture. A common approach is based on correlated double sampling (CDS) or auto-zeroing, where the system periodically samples and subtracts its own offset and low-frequency noise components. By effectively “resetting” the noise baseline, the integrator can focus on the true input signal rather than accumulated error.

By implementing the modification shown in Fig. 4, the noise from the integrating OpAmp is also CDS’d in an elegant solution that is tailored to the IAF architecture. The auxiliary OpAmp noise can also be cancelled out by adding some intelligent switching. By combining these noise cancellation schemes, IAF-based ADCs can maintain high accuracy even in the presence of dominant low-frequency noise, opening the door to applications that would otherwise be impractical for this architecture.

3. Why Is the Integrate-and-Fire ADC Still Relevant in Modern ASIC Design?

The integrate-and-fire (IAF) ADC architecture offers a compelling solution for precision current measurement in ASIC design, particularly due to its natural compatibility with current-domain signals, low-power operation, and scalability across a wide range of applications. By converting current into the time domain via charge integration and pulse generation, it avoids many of the limitations of traditional voltage-based ADCs, making it especially attractive for highly integrated and energy-constrained systems, where die size and cost are key factors.

While the basic IAF approach has inherent limitations in linearity, resolution, and low-frequency performance, the techniques discussed demonstrate how these challenges can be effectively addressed. The true strength of the IAF architecture lies in its flexibility. These enhancement techniques can be selectively combined and optimized depending on the target application. By tailoring architecture, designers can create ADCs to meet the specific requirements of a wide range of applications.

As electronic systems continue to push toward lower power consumption and higher precision, integrate-and-fire ADCs are poised to play an increasingly important role in next-generation current sensing solutions.

Alejandro Suanes Perez, ASIC Design Engineer, Presto Engineering Denmark