Single chip DSRC for toll road tag applications

DSRC compliant toll road identification and payment device

A fully integrated system-on-chip (SoC) communication and payment processing device for DSRC compliant toll road payment systems.

The chip includes a 32 bit RISC processor and flash memory to allow for customer specific firmware to control the payment transactions. It also features built in cryptographic cores to support hardware assisted AES encryption.

The platform supports ultra-low power listening mode with intelligent false wakeup discriminator to allow for 10+ years of battery operation. Built in hardware supports tamper protection and low battery warning. 

Application areas :

• Toll road systems motorways, bridges, urban areas, ferries etc.
• Parking lot payment systems.
• Tacometer monitoring in trucks etc.

Top technical features:

• Based on 5.8GHz reflective communication
• Battery operated
• Ultra-low power listen mode current consumption ( < 2uA )
• Intelligent discriminator to prevent false wakeups
• High sensitivity ( -43 dBm )
• Flash for firmware and data
• AES for encryption
• External envelope detector diode