With semicondcutors, most things start and most things end with yield--as high as possible, as early as possible.

Back in the sub-micron days, fabs were focusing on contamination and design on functional issues. These were clearly decoupled, with the assumption that once a design would pass functional test, yield was (almost) a fab-only job.

In order to get there, product engineering (along with design) would validate design with testers and internal signal measurement tools--almost exclusively at the electrical level. Conversely, yield engineers would improve yield at the physical level only, with no notion of what each design was intended do perform eclectrically.

As shown above, in the nanometer era, design and process are now closely interelated. The goal is now to find the optimal overlap between process window and design marginality. Product validation engineers need to understand the process implementing new designs; product yield engineers need to understand device functionality in order to ramp new products in the fab.

With new process technology, material and lithography techniques, new design can no longer be analyzed statically. While design for manufacturing (DFM) helped narrow the bridge between design and process, real in-circuit measurement are more and more critical to understanding the margins required to ensure good and predictable yields.

The role of most product engineers has merged into a combination of design validation and yield enhancement. With this, the capabilities required have 'merged' also. What used to be segregated either on the test floor (electrical) or in the lab (physical) has now to be combined, and often used together.

This is called Design Success Analysis™.