Michel Villemain, Ph.D.

Michel Villemain has more than 15 years of experience in the semiconductor test and failure analysis equipment business.

Most recently, Michel was Vice President Marketing for the Circuit Edit and Mask Repair Division at FEI. Prior to that, he was General Manager of the CD-SEM Business Unit at KLA-Tencor. Michel started his career with Schlumberger (later NPTest), where he served in various technical and managerial capacities over 19 years, in Europe, Texas and California. He has served as General Manager for Schlumberger ATE Europe, Vice President Marketing of the Test Division, and for five years General Manager of the Probe Systems (IDS) Division.

Michel graduated from Ecole Polytechnique in France, and holds a Ph.D. in Computer Science from Orsay University.

Frank Sauk

Frank Sauk has over 25 years experience in the semiconductor test and failure analysis industry.

Most recently, he was Director of Diagnostic Services and Member of Technical Staff at Credence. Frank was a founding member of SABER at Schlumberger where he initiated worldwide failure analysis services. In this groundbreaking division, he was key in establishing alliances and delivering results to foundries, design service providers and design houses.

Previously, Frank has contributed in technical and management roles in Massachusetts, Texas and California.

Frank has published a number of papers on electrical failure analysis and has been awarded two patents. He graduated from MIT with a MS and BS in Electrical Engineering and Computer Science.

Richard Curtin

Richard Curtin has more than 20 years of experience in the semiconductor design automation industry.

Most recently, he was vice president of business development for a silicon intellectual property (IP) vendor targeting SoC validation and debug. Prior to that, he held senior sales and marketing-management positions with early-stage hardware and software companies in the EDA industry.

Richard has a B.S. degree in computer engineering from Boston University, an M.B.A. degree from Pepperdine University, and a master of engineering, electrical engineering, from Cornell University. He also holds two patents in the area of chip design.

Egil Castel

Egil Castel has over 20 years experience in semiconductor fab management and silicon process equipment development and manufacturing.

Most recently he was managing development and market introduction of Ebeam-based tools at KLA-Tencor. In this position, he secured long-term cooperative relationships with top 20 semiconductor companies with resulted in timely introduction of state-of-the-art equipment to the marketplace.

Egil has authored more than 40 papers and has been awarded several US patents. He graduated from the University of Paris, France, with the M.S. degree in Chemistry and Ph.D. in Physics.

Moshe Zalcberg

Moshe has more than 20 years of experience in the semiconductor and design automation industries, having spent the past 12 years of his career at Cadence Design Systems – most recently as General Manager of Israeli operations. Prior to that position, Moshe was European Director for Professional Services at Cadence.

Moshe has performed various management, sales, business development and technical roles, having started his career as an ASIC designer. He is an electrical engineering graduate of the Technion Israel Institute of Technology and holds an MSc in Electronics and an MBA from Tel Aviv University.

Cédric Mayor

Cédric Mayor has more than 9 years of experience in the semiconductor product design and industrialization.

Most recently in the Netherlands and in France, he was in charge of new product bring up and debug activitiy for NXP Semiconductors, especially on advanced process nodes in Asian foundries. Cedric also held product transfer and ramp-up positons supporting the NXP Corporate Operation sourcing. Prior to that, he was R&D memory design architect in charge of innovative SRAM/ROM compilers in a start up which became the SOI hard IP department of ARM Ltd.

Cédric graduated from Ecole Centrale Marseille in France, and holds a MS of Physics and Electrical Engineering and four patents in the area of chip design.

Patrick Poirier

Patrick Poirier has more than 15 years of experience in the semiconductor industry in test, failure analysis and reliability activities.

Before joining Presto Engineering in the beginning of 2010 to build its Normandy Hub (France), Patrick was responsible for the failure analysis and reliability laboratories of NXP semiconductor in Caen (France) and technical director of the LaMIPS, the joint research institute between NXP and the Crismat. Prior to that, he occupied various functions, technical and managerial, in the failure analysis and test field within NXP and other companies.

Patrick graduated from Institut National des Sciences Appliquées from Rennes (France); he is an active member of ANADEF (the French Failure Analysis society) since 2001.

Jean-Pascal Mallet

Jean-Pascal Mallet has more than 19 years of experience in the Automatic Test Equipment industry.

Most recently, he was engineering manager at Credence. Previously he held senior engineering positions at Schlumberger; Jean-Pascal was instrumental in various developments for ITS 9000, Deft and Sapphire high-end test systems platforms, serving computing, wireless, consumer, and linear semiconductors markets.

Jean-Pascal has published a technical paper at ITC and he is the author of three patents. He graduated from INT (Institut National des Telecommunications) with a MS in Electronic Engineering.