Once physical fault isolation has identified a location of interest within a chip, it is often necessary (before further actions) to confirm electrically the assumptions made from isolation.

Electrical Failure Analysis (EFA) is the process of obtaining electrical signals from within the device (as opposed to outside pins). The tools used to achieving this (below) are almost always docked to ATE (or used with evaluation boards).

Mechanical probes and E-beam are useful tools when voltage accuracy is a leading consideration. They both require Focused Ion-Beam (FIB) probe points, which creates challenges when the process has multiple metal layers, or if the package permits only backside access.

LVP and TRE are both backside probing techniques that only require a fairly simple sample preparation (when done with expertise). They both extract timing information from transistors, with excellent bandwidth.

With the appropriate optics (solid immersion lenses, or SIL), backside tools are capable of addressing 45nm-type requirements.